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7.1 A 1/4-inch 8Mpixel CMOS image sensor with 3D backside-illuminated 1.12μm pixel with front-side deep-trench isolation and vertical transfer gate

Authors :
Donghyuk Park
Chung Youngwoo
Tae Chan Kim
Gab-Soo Han
Young-Chan Kim
Yunkyung Kim
Duck-Hyung Lee
Jeonsook Lee
Eun-Kyung Park
Seungjoo Nah
Y. Jay Jung
Dongyoung Jang
Gyehun Choi
Hong-ki Kim
Jong-Eun Park
Yi-tae Kim
Taeheon Lee
Jung-Chak Ahn
Yooseung Lee
Yujung Choi
Kyung-Ho Lee
Joon-Hyuk Im
Bum-Suk Kim
Mi Hye Kim
Daniel K. J. Lee
Haeyong Park
Heesang Kown
Sangjun Choi
Ihara Hisanori
Goto Hiroshige
Byung-hyun Yim
Won-Je Park
Sung-Ho Choi
Youngsun Oh
Seung-Wook Lee
Taesub Jung
H.S. Jeong
Chi-Young Choi
Gi-Doo Lee
Source :
ISSCC
Publication Year :
2014
Publisher :
IEEE, 2014.

Abstract

According to the trend towards high-resolution CMOS image sensors, pixel sizes are continuously shrinking, towards and below 1.0μm, and sizes are now reaching a technological limit to meet required SNR performance [1-2]. SNR at low-light conditions, which is a key performance metric, is determined by the sensitivity and crosstalk in pixels. To improve sensitivity, pixel technology has migrated from frontside illumination (FSI) to backside illumiation (BSI) as pixel size shrinks down. In BSI technology, it is very difficult to further increase the sensitivity in a pixel of near-1.0μm size because there are no structural obstacles for incident light from micro-lens to photodiode. Therefore the only way to improve low-light SNR is to reduce crosstalk, which makes the non-diagonal elements of the color-correction matrix (CCM) close to zero and thus reduces color noise [3]. The best way to improve crosstalk is to introduce a complete physical isolation between neighboring pixels, e.g., using deep-trench isolation (DTI). So far, a few attempts using DTI have been made to suppress silicon crosstalk. A backside DTI in as small as 1.12μm-pixel, which is formed in the BSI process, is reported in [4], but it is just an intermediate step in the DTI-related technology because it cannot completely prevent silicon crosstalk, especially for long wavelengths of light. On the other hand, front-side DTIs for FSI pixels [5] and BSI pixels [6] are reported. In [5], however, DTI is present not only along the periphery of each pixel, but also invades into the pixel so that it is inefficient in terms of gathering incident light and providing sufficient amount of photodiode area. In [6], the pixel size is as large as 2.0μm and it is hard to scale down with this technology for near 1.0μm pitch because DTI width imposes a critical limit on the sufficient amount of photodiode area for full-well capacity. Thus, a new technological advance is necessary to realize the ideal front DTI in a small size pixel near 1.0μm.

Details

Database :
OpenAIRE
Journal :
2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC)
Accession number :
edsair.doi...........1cc98089be8daa57e0c0f8ae1d5d95de
Full Text :
https://doi.org/10.1109/isscc.2014.6757365