High linearity source-follower buffer based analog memory for analog convolutional neural network

An analog memory based on the high linearity source-follower buffer topology is proposed, which is applied to the emerging Analog Convolutional Neural Network (CNN) for buffering parameters and operation results. The proposed memory consists of a source-follower type buffer, which delivers an appreciably enhanced accuracy over that of the conventional buffer, and a storage capacitor to meet the Analog CNN processing demands of accurate short-term storage and multi-reading capability. The enhanced linearity of the proposed buffer is achieved by adopting high-threshold cascode (HTC) structure and low parasitic capacitance switch (LPCS). Moreover, a low leakage bootstrap (LLB) structure is integrated to enhance the turn-off performance of switch, which reduces the leakage and improves the accuracy of buffer significantly. Simulated with 180 nm CMOS mixed-signal process, the proposed analog memory unit achieves power consumption of 3.6 μW and output error of 0.4%, with the input voltage swing of 1.1 V .