Unknown Threats and Provisions

It is hard to envision all possible use cases or environmental conditions that might happen to a VLSI system during its lifetime and could adversely affect its performance and/or dependability. The job of designing and testing a VLSI includes the challenge of being prepared even against problems hard to foresee, within the restrictions of practical cost and time. This chapter is intended to offer a perspective for unidentified future threats to dependability and provisions in design and test that could be taken to mitigate them. First of all, in Sect. 12.1, we look back on the trend in the fault causes experienced over time, and discuss unidentified future threats and technical challenges. Section 12.2 takes up the cloud data center that provides IaaS (Infrastructure as a Service) as a typical electronic system requiring high levels of dependability from a few different subsystem perspectives, i.e., server, storage, and communications, and discusses relevant emerging requirements. In Sect. 12.3, the concept of “patchable hardware and rectification for post-Silicon validation” is introduced. Section 12.4 deals with collecting the field test data for preventive maintenance and potentially for post-failure analysis and future study based on the technology called DART (Dependable Architecture with Reliable Testing). Section 12.5 deals with the fault detection and reconfiguration method for multiple-core processor is discussed. Finally, in 12.6, checkpoint-restart for heterogeneous multiple processor systems is proposed as a standard procedure for dependability.