Cross-bar switch multiple microprocessor system

The main objective of this work is to design and construct a small multiple microprocessor system based on the cross-bar switch architecture. The motives behind this are twofold; firstly there seems to be great potential in the architecture, and secondly, few previous constructional projects employing this architecture have been reported. A system is presented employing three Z80 microprocessors in a master-slave configuration with a floppy disc based support system. The various design decisions are outlined, and an estimate is made of the reliability of the hardware. This work, in particular, has highlighted the flexibility and simplicity of the architecture, in addition to the obvious potential of high speed of operation. It is also found that parallel programs can easily map onto the system, though this is not dealt with here.