FPGA Implementation of True Random Number Generator Architecture Using All Digital Phase-Locked Loop

Authors :: Manoj Kumar
Huirem Bharat Meitei
Source :: IETE Journal of Research. 68:1561-1570
Publication Year :: 2021
Publisher :: Informa UK Limited, 2021.
Abstract: This study is a unique approach for the design and implementation of True Random Number Generator (TRNG) using ADPLL, on Field-Programmable Gate Array (FPGA) board Artrix-7 (XC7A35T-CPG236-1) and t...

Subjects :: Phase-locked loop
Gate array
Computer science
business.industry
Random number generation
Ring oscillator
Electrical and Electronic Engineering
Architecture
Field-programmable gate array
business
Computer hardware
Computer Science Applications
Theoretical Computer Science

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