A 0.13 <formula formulatype='inline'><tex Notation='TeX'>$\mu$</tex> </formula><emphasis emphasistype='roman'>m</emphasis> CMOS Quad-Band GSM/GPRS/EDGE RF Transceiver Using a Low-Noise Fractional-N Frequency Synthesizer and Direct-Conversion Architecture

This paper presents a single-chip CMOS quad-band (850/900/1800/1900 MHz) RF transceiver for GSM/GPRS/EDGE applications which adopts a direct-conversion receiver, a direct-conversion transmitter and a fractional-N frequency synthesizer with a built-in DCXO. In the GSM mode, the transmitter delivers 4 dBm of output power with 1deg RMS phase error and the measured phase noise is -164.5 dBc/Hz at 20 MHz offset from a 914.8 MHz carrier. In the EDGE mode, the TX RMS EVM is 2.4% with a 0.5 dB gain step for the overall 36 dB dynamic range. The RX NF and IIP3 are 2.7 dB/-12 dBm for the low bands (850/900 MHz) and 3 dB/-11 dBm for the high bands (1800/1900 MHz). This transceiver is implemented in 0.13 mum CMOS technology and occupies 10.5 mm2. The device consumes 118 mA and 84 mA in TX and RX modes from 2.8 V, respectively and is housed in a 5 times 5 mm2 40-pin QFN package.