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FOI FinFET with ultra-low parasitic resistance enabled by fully metallic source and drain formation on isolated bulk-fin

Authors :
Tao Yang
Jun Luo
Huaxiang Yin
Jianfeng Gao
Shujian Mao
Huilong Zhu
Changliang Qin
Zhangyu Zhou
Qiuxia Xu
Yang Qu
Yudong Li
Jiang Yan
Guilei Wang
Hong Yang
Yanbo Zhang
Junfeng Li
Qingzhu Zhang
Zhenhua Wu
Wenjuan Xiong
Junjie Li
Gaobo Xu
Chao Zhao
Tianchun Ye
Jinbiao Liu
Lingkuan Meng
Jinjuan Xiang
Yongkui Zhang
Source :
2016 IEEE International Electron Devices Meeting (IEDM).
Publication Year :
2016
Publisher :
IEEE, 2016.

Abstract

The large parasitic resistance has become a critical limiting factor to on current (I ON ) of FinFET and nanowire devices. Fully metallic source and drain (MSD) process is one of the most promising solutions but it often suffers from intolerant junction leakage in bulk FETs. In this paper, fully MSD process on fin-on-insulator (FOI) FinFET is investigated extensively for the first time. By forming fully Ni(Pt) silicide on physically isolated fins, about 90% reduction in contacted resistivities (R c s) and 55% reduction in sheet resistances (R s s) are achieved without obvious junction leakage degradation. As a consequence, Ion of transistor, with gate length (L g ) of 20nm, is increased 30 times, up to 547μA/μm for NMOS and 324 μA/μm for PMOS, respectively. Excellent controls of SCE and channel leakage with 47% DIBL, 32% SS and 2.5% device leakages reductions over the counterpart of conventional bulk FinFETs are also obtained. Meanwhile, the fully MSD process induces clear tensile stress into narrow fin-channel, resulting in enhanced electron mobility in NMOS. A further improvement in PMOS drive ability (486μA/μm) by using Schottky barrier source and drain (SBSD) technology is also explored.

Details

Database :
OpenAIRE
Journal :
2016 IEEE International Electron Devices Meeting (IEDM)
Accession number :
edsair.doi...........1402aae4f3105cecc2ccf934a91cb601
Full Text :
https://doi.org/10.1109/iedm.2016.7838438