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High Area-Efficient DC-DC Converter With High Reliability Using Time-Mode Miller Compensation (TMMC)

Authors :
Seungchul Jung
Tae-Hwang Kong
Sungwoo Lee
Gyu-Hyeong Cho
Changbyung Park
Sang-Hui Park
Sung-Wan Hong
Source :
IEEE Journal of Solid-State Circuits. 48:2457-2468
Publication Year :
2013
Publisher :
Institute of Electrical and Electronics Engineers (IEEE), 2013.

Abstract

This paper presents a novel on-chip compensation scheme, the Time-Mode Miller Compensation (TMMC), for DC-DC converter in which the compensation components are integrated on-chip. Using this proposed scheme, the DC-DC converter is stably compensated and insensitive to process variations, with significantly small compensation components ( 1 pF and 80 kΩ in this work) consuming very small silicon area owing to the characteristic of the TMMC. The small compensation components make the chip size small, with 0.12 mm2 of core area (w/o power transistors) using 0.18 μm I/O process. This core size is as small as that of the digital DC-DC converters implemented with less than sub-50 nm process. The measurement result shows that the maximum power efficiency of 90.6% is obtained at the load current of 220 mA with the switching frequency of 1.15 MHz when the input and the output voltages are 3.3 V and 2 V, respectively.

Details

ISSN :
1558173X and 00189200
Volume :
48
Database :
OpenAIRE
Journal :
IEEE Journal of Solid-State Circuits
Accession number :
edsair.doi...........12e69122be0e4a53948e807b82930cd7
Full Text :
https://doi.org/10.1109/jssc.2013.2272845