Development of high-speed camera with image quality evaluation

High-speed CMOS camera can capture high frame rate phenomena for a wide range of applications. However, most of the cameras currently in use are simply outputting pixel data, and cannot be adjusted in real time when the surrounding environment changes. The main idea of this paper is to develop a compact high-speed CMOS camera that can evaluate the image quality in real time while transmitting high-speed image data stably. The camera is based on the architecture of high-speed CMOS image sensor and FPGA (Field-Programmable Gate Array). The built-in sensor control, data transmission and image quality evaluation are all designed using Verilog HDL (Hardware Description Language). Our camera ensures that the processing unit at the back end of the vision system can receive high-quality images.