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A 130nm FeRAM-based parallel recovery nonvolatile SOC for normally-OFF operations with 3.9× faster running speed and 11× higher energy efficiency using fast power-on detection and nonvolatile radio controller

Authors :
Takashi Tsuwa
Takahiko Saito
Yongpan Liu
Yiqun Wang
Fang Su
Xueqing Li
Huazhong Yang
Koji Taniuchi
Zhongjun Wang
Takashi Naiki
Ryuji Yoshimura
Meng-Fan Chang
Zhibo Wang
Zewei Li
Source :
2017 Symposium on VLSI Circuits.
Publication Year :
2017
Publisher :
IEEE, 2017.

Abstract

This paper proposes a FeRAM-based Nonvolatile SOC (NVSOC) to obtain system-level startup acceleration and energy efficiency enhancement for normally-off applications. The NVSOC supports adaptive parallel recovery and two fast startup schemes. The quick power-on detection is enabled by hysteresis-comparator based voltage detector and leakage cutoff controller. A nonvolatile radio frequency controller (NVRF) is first proposed to further boost the recovery of transceivers. Compared with the fastest switching nonvolatile processor based platform, measurement results show NVSOC achieves 3.9× faster running speed and 11× higher energy efficiency to execute periodical normally-off sensing and transmitting tasks. This is the first parallel recovery enabled NVSOC with fast power-on detection and RF initialization capability.

Details

Database :
OpenAIRE
Journal :
2017 Symposium on VLSI Circuits
Accession number :
edsair.doi...........103669d188c1258c902e26b3138b3a03