Performance evaluation of a full speed PCI initiator and target subsystem using FPGAs

State-of-the-art FPGAs are just capable of implementing PCI bus initiator and target functions at the original bus speed of 33 MHz. This paper reports on the use of a Xilinx 4000 series FPGA and LogiCore macros to implement a fully compliant PCI card for a specialist data acquisition application. The design required careful performance analysis and manual intervention during the design process to ensure successful operation.