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Chip to wafer hermetic bonding with flux-less reflow oven

Authors :
Christoph Oetzel
Sunil Wickramanayaka
Leong Ching Wai
Vivek Chidambaram Nachiappan
Source :
2016 IEEE 18th Electronics Packaging Technology Conference (EPTC).
Publication Year :
2016
Publisher :
IEEE, 2016.

Abstract

In this study, it is shown that temporary tacking (without flux and temporary tack materials) is feasible to temporary tack Cu/SnAg or SnAg sealing ring onto Cu sealing ring at the bottom wafer. The temporary tacked samples were reflowed in a formic acid environment and this allowed the removal of the native oxide of solder. The removal of oxide provides a good solder joints formation during reflow [4]. Vacuum reflow with formic acid and load of 20g per unit showed good sealing results. Helium leak test for chip on silicon substrate was carried out. The results indicated the leak rate at the level of ≤ 5×10−8 atm cc/s Helium can be achieved. Chip on wafer (CoW) bonding with hermetic sealing was demonstrated on 8″ wafer with cavity.

Details

Database :
OpenAIRE
Journal :
2016 IEEE 18th Electronics Packaging Technology Conference (EPTC)
Accession number :
edsair.doi...........0d9c3da790831eb9384b291cc9cce332