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IR thermography and FEM simulation analysis of on-chip temperature during thermal-cycling power-metal reliability testing using in situ heated structures

Authors :
Vladimír Košel
Helmut Kock
Christian Djelassi
Michael Glavanovics
Dionyz Pogany
Source :
Microelectronics Reliability. 49:1132-1136
Publication Year :
2009
Publisher :
Elsevier BV, 2009.

Abstract

A calibrated system for power metal reliability analysis in smart power technology chips is presented. This system is mainly designed for temperature evaluation during temperature-cycling experiments. Infrared camera measurements under single shot high energy pulses are correlated with electro-thermal finite element simulation and failure analysis. A special test structure, containing poly-silicon heaters, is used to produce thermal stress. The location of a hot spot agrees well with the position of degraded power metal.

Details

ISSN :
00262714
Volume :
49
Database :
OpenAIRE
Journal :
Microelectronics Reliability
Accession number :
edsair.doi...........0d16135d05b000ab823ff1b5d1896db6