Research and Implementation of the HD Video Real-Time Edge Detection System Based on FPGA

In this paper, we propose a high-definition (HD) video real-time edge detection system, also presenting its hardware design and implementation results. Traditional median filtering blurs image details while removing noise, therefore we propose the improved median filtering algorithm which not only effectively removes impulse noise, but also retains more image details. For the problem that traditional sobel edge detection algorithm easily loses graphic details. This paper proposes the improved sobel edge detection algorithm which extends the gradient direction to eight, introducing local adaptive threshold and non-maximum suppression. The proposed algorithms were designed with Verilog-HDL, and the real-time operation was verified and evaluated using an field programmable gate array (FPGA) based test system at an operating frequency of 200MHz for 1280×720 HD video.