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Impact of interface preparation on defect generation during wafer bonding
- Source :
- IEEE SOS/SOI Technology Conference.
- Publication Year :
- 2003
- Publisher :
- IEEE, 2003.
-
Abstract
- Large interfacial voids in bonding and etch-back silicon-on-insulator (BESOI) are discussed. After wafer contacting, the presence of several large interfacial voids is observed. High-resolution X-ray topographs confirm either foreign particles or epitaxial spikes in the center region of voids as the reason for nonbonding. The voids at the bonding interface contain trapped air pockets, which are under pressure. In general, as a result the entire area covered by the voids is lost to the SOI film due to cracking and delamination during the etch-back procedure. In order to investigate the lattice damage distribution and the strain related to it, elastic light scattering experiments were performed. The findings of local networks of elastic distortion are an indication of insufficient wafer flatness and surface finish. BESOI wafers were examined again after they had been subjected to the 30-min high-temperature polymerization bonding step at 1050 degrees C. The areas of the voids that had been free of extended defects following the wafer contracting step then exhibited a dense network of misfit dislocations. During thermal annealing at 1050 degrees C the stresses at the perimeter of the voids and at the site of particulate contamination increased to the point where they exceeded the critical resolved shear stress of silicon and dislocations were nucleated. >
Details
- Database :
- OpenAIRE
- Journal :
- IEEE SOS/SOI Technology Conference
- Accession number :
- edsair.doi...........067be5ea0032c42aeff8eaaa8c715746
- Full Text :
- https://doi.org/10.1109/soi.1989.69783