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Power Comple ity Analysis of Adiabatic SRAM
- Source :
- 2005 6th International Conference on ASIC.
- Publication Year :
- 2006
- Publisher :
- IEEE, 2006.
-
Abstract
- The paper presents a power analysis model for adiabatic SRAM. According to different performance frequency and different memory size, we simulate, analyze and compare adiabatic SRAM's power characteristics and propose the model. Based on the power analysis model, a scheme of array-division for adiabatic SRAM is presented. With array-division structure, the power dissipation is related to m, which is the array-division value. When the value increases, the main source of SRAM power is changed from word-line and cell-clock to decoder
- Subjects :
- Adiabatic circuit
Engineering
Hardware_MEMORYSTRUCTURES
business.industry
Hardware_PERFORMANCEANDRELIABILITY
Dissipation
Power (physics)
Computer Science::Hardware Architecture
Power analysis
Computer Science::Emerging Technologies
Low-power electronics
Electronic engineering
Static random-access memory
business
Adiabatic process
Subjects
Details
- Database :
- OpenAIRE
- Journal :
- 2005 6th International Conference on ASIC
- Accession number :
- edsair.doi...........020c16b5274dadf3aa2d4bc117d5f884
- Full Text :
- https://doi.org/10.1109/icasic.2005.1611318