Design of 1 280×1 024 DI Multi-Functional IRFPA Readout Circuit

To meet the needs of the third generation infrared detector, a design of 1 280×1 024 pixel infrared readout circuit with large array and low power consumption is proposed. Based on the analysis of each module, low-power readout and working sequence of super array pixel unit are mainly designed, which improves the driving ability of the output buffer to the external system, and the integration while reading and multi-channel output functions are realized. Under the working conditions of temperature of 80 K and clock frequency of 5 MHz, 4-way and 8-way readout and linearity simulations of pixel array window are performed. The output frame rate could reach 60 Hz, the output voltage swing is 1.6~4.8 V, the maximum power consumption is less than 450 mW, and the linearity is 97.76%.