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Bipolar silicon carbide power diodes realized by aluminum implantations and high temperature rf-annealing
- Source :
- 43rd Electronic Materials Conference (EMC 2001), 43rd Electronic Materials Conference (EMC 2001), Jun 2001, Notre Dame, IN, United States
- Publication Year :
- 2001
- Publisher :
- HAL CCSD, 2001.
-
Abstract
- International audience; Silicon carbide has received an important attention for high-power, high-temperature and high-speed electronic fields. Ion implantation, the only method to locally dope SiC, seems to be a delicate point especially to obtain p-type silicon carbide regions. High temperature post-implantation annealings in particular conditions (high heating ramp, silicon and carbide overpressure) are needed to achieve well activated layers in a well preserved crystalline state. In a first time an optimized post-annealing process was obtained. A SiC dedicated furnace was used to anneal room temperature (RT) and 300°C aluminum (Al) implanted 6H-SiC samples. Recrystallization and surface preserving were investigated by physico-chemical analyses like: Rutherford Backscattering Spectrometry (RBS), X-Ray Photoelectron Spectroscopy (XPS) and Atomic Force Microscopy (AFM). Systematic Secondary Ion Mass Spectroscopy (SIMS) analyses were carried out before and after annealing. Well recrystallized samples were found even if ion implantations (at room temperature) have lead to amorphous layers, in terms of RBS results, with an annealing at 1700°C during 30 min. A relatively important roughness (14.4 nm rms) was found by AFM analyses. SIMS investigations show that the doping profile is preserved and no Al diffusion occurs 1. Four-point probe measurements prove a high electrical dopant activation, in terms of Al incorporation in SiC active lattice sites. 50% (respectively 100%) activation was found after an annealing at 1700°C during 30 min for RT (respectively 300°C) implanted samples. This process has been applied to fabricate 4H-and 6H-SiC bipolar power diodes, on n-type epitaxial layers purchased from Cree Research (40 µm, 1.1x10 15 cm-3 epitaxial doping for 4H-SiC wafers and 10 µm, 6x10 15 cm-3 epitaxial doping for 6H-SiC wafers). A Junction Termination Extension (JTE) structure was chosen after physical and electrical simulations using ISE TCAD and MEDICI program softwares. Several electrical test-structures were added to investigate dopant preservation and activation, the quality of the ohmic contact metallization and lithographic process. Hall effect in a Van der Pauw geometry and TLM (Transmission Line Model) measurements confirm the dopant activation and 5x10-4 W cm 2 contact resistance was found at 300K for an Al-Ti process metallization on p-type doped zones (4x10-19 cm-3 Al implanted box profile). Forward current density obtained by I-V measurements at 300 K on JTE bipolar diodes is 50 A/cm 2 at 5V drop voltage. In reverse bias these diodes have shown blocking voltage capabilities up to 1kV for 6H-SiC wafer and 2.3 kV for the 4H-SiC one.
- Subjects :
- [SPI.NRJ]Engineering Sciences [physics]/Electric power
Subjects
Details
- Language :
- English
- Database :
- OpenAIRE
- Journal :
- 43rd Electronic Materials Conference (EMC 2001), 43rd Electronic Materials Conference (EMC 2001), Jun 2001, Notre Dame, IN, United States
- Accession number :
- edsair.dedup.wf.001..e640513c9c46fd840b4a3b93c1222457