The CPIX Demonstrator Modules

International audience; To face the new challenges brought by the upgrades of the Large Hadron Collider at CERN by the year 2023, the planned increase towards High Luminosity with peak luminosities of up to 1035.cm-2.s-1 requires a fundamental redesign of the complete ATLAS inner detector (ITK), due to both increased radiation levels and increased occupancy in the sub-detectors. One solution for hybrid pixel replacement is to use industrial CMOS foundries offering High Voltage (HV) design option and even in some cases the possibility of High Resistivity (HR) substrate, allowing the creation of a deep depletion zone, suitable for particle detection with active pixel detectors. These technologies offer in-pixel fast signal processing solutions, reduce the pixel cluster sizes and are potentially cheaper than the today's hybrid approaches. Studies concerning radiation tolerance are also very encouraging. The current ATLAS R&D program, called CPIX demonstrator, aims to prove the feasibility of HV/HR-CMOS detector as an option for parts of the pixel detector in the ATLAS ITK Technical Design Report in 2017 and last experimental results in several processes will be reviewed and presented.