Challenges for high performance and very low power operation at the end of the Nanoelectronics Roadmap

Authors :: Balestra, Francis
Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC )
Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019])
Ducroquet, Frédérique
Source :: Solid-State Electronics, Solid-State Electronics, Elsevier, In press
Publication Year :: 2019
Publisher :: HAL CCSD, 2019.
Abstract: International audience; Future Nanoelectronic devices faces substantial challenges, in particular increased power consumption, saturation of performance, large variability and reliability limitation. In this respect, novel materials and innovative device architectures will be needed for Nanoscale FETs.

Subjects :: [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics
Hardware_INTEGRATEDCIRCUITS
Hardware_PERFORMANCEANDRELIABILITY
[SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics
Hardware_LOGICDESIGN

Language :: English
ISSN :: 00381101
Database :: OpenAIRE
Journal :: Solid-State Electronics, Solid-State Electronics, Elsevier, In press
Accession number :: edsair.dedup.wf.001..7d019414351d865dccb3ffdbe5f7a227

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