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Experimental measurements and 3D simulation of the parasitic lateral bipolar transistor triggering within a single finger gg-nMOS under ESD
- Source :
- Microelectronics Reliability, Microelectronics Reliability, Elsevier, 2004, 44 (9-11), pp.1775-1780
- Publication Year :
- 2004
- Publisher :
- HAL CCSD, 2004.
-
Abstract
- International audience; The aim of this study is to propose an analysis of the parasitic lateral bipolar triggering into a single finger grounded gate n-MOS transistor under Transmission Line Pulse (TLP) stress. The experimental values are compared to numerical results issued from 3D simulation. Emission Microscopy for Multi-layer Inspection (EMMI) views and physical extractions for analysis during this electrical stress reveal similar results. Thus, it appears that the triggering is different for two ElectroStatic Discharge (ESD) current levels. (C) 2004 Elsevier Ltd. All rights reserved.
Details
- Language :
- English
- ISSN :
- 00262714
- Database :
- OpenAIRE
- Journal :
- Microelectronics Reliability, Microelectronics Reliability, Elsevier, 2004, 44 (9-11), pp.1775-1780
- Accession number :
- edsair.dedup.wf.001..25858d9abaa1d5b9abd46bb359bea734