A 935–953-MHz Q-Enhanced CMOS Tunable Bandpass Filter With Ultra-Narrowband and Ultralow Power for RFID Applications

A <inline-formula> <tex-math notation="LaTeX">$Q$ </tex-math></inline-formula>-enhanced CMOS tunable bandpass filter (BPF) with ultra-narrow bandwidth and ultralow dc power consumption for radio frequency identification (RFID) devices is proposed using 55-nm bulk CMOS technology in this article. The proposed filter is constructed by a capacitively coupled LC resonator (LCC), which consists of a 16-nH on-chip integrated inductor, fixed capacitors, and tunable varactors. nMOS cross-coupled transistors are used to compensate for the loss of the resonator and improve the loaded <inline-formula> <tex-math notation="LaTeX">$Q$ </tex-math></inline-formula> of the resonator. To achieve low power consumption, an inductor with an ultralarge value is exploited to reduce the loss of the resonator. Besides, an improved dual varactor inverse (DVI) and degenerated resistors at the source of the cross-coupled transistors with linearity and resistance adjusting, respectively, are utilized to optimize the linearity under center frequency tuning. Besides, the active circuits, the fixed capacitance, and varactors are placed inside the inductor to improve the integration. With all the proposed techniques, the presented BPF achieves a 935–953-MHz center frequency tuning range with a constant narrow bandwidth of 180 kHz, a low power consumption of <inline-formula> <tex-math notation="LaTeX">$85~\mu \text{W}$ </tex-math></inline-formula>, and a core area of <inline-formula> <tex-math notation="LaTeX">$0.43\times0.43$ </tex-math></inline-formula> mm2, demonstrating a high-performance tunable on-chip filter using bulk CMOS technology for low-power and narrowband Internet of Things (NBIoT) applications.