Non-Linear Gate Stack Effect on the Short Circuit Performance of a 1.2-kV SiC MOSFET

In this paper, the effect of a non-linear dielectric gate stack on the short-circuit performance of a 1.2 kV SiC MOSFET was analyzed through TCAD simulations. Starting from the TCAD model of a commercial 1.2 kV, its standard gate oxide was replaced with a stack formed by oxide and a non‑linear dielectric, characterized by a temperature dependent permittivity. This variation on temperature can be exploited to reduce the current conducted during short-circuit events, lowering the temperature reached through the device by about 30%, without affecting its static and dynamic performance.