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A 0.00179 mm2/Ch Chopper-Stabilized TDMA Neural Recording System With Dynamic EOV Cancellation and Predictive Mixed-Signal Impedance Boosting

Authors :
Fathy, Nader Sherif Kassem
Vatsyayan, Ritwik
Bourhis, Andrew M.
Dayeh, Shadi A.
Mercier, Patrick P.
Source :
IEEE Transactions on Biomedical Circuits and Systems; August 2024, Vol. 18 Issue: 4 p908-922, 15p
Publication Year :
2024

Abstract

This article presents a digitally-assisted multi-channel neural recording system. The system uses a 16-channel chopper-stabilized Time Division Multiple Access (TDMA) scheme to record multiplexed neural signals into a single shared analog front end (AFE). The choppers reduce the total integrated noise across the modulated spectrum by 2.4<inline-formula><tex-math notation="LaTeX">$ \times $</tex-math></inline-formula> and 4.3<inline-formula><tex-math notation="LaTeX">$ \times $</tex-math></inline-formula> in Local Field Potential (LFP) and Action Potential (AP) bands, respectively. In addition, a novel impedance booster based on Sign-Sign least mean squares (LMS) adaptive filter (AF) predicts the input signal and pre-charges the AC-coupling capacitors. The impedance booster module increases the AFE input impedance by a factor of 39<inline-formula><tex-math notation="LaTeX">$ \times $</tex-math></inline-formula> with a 7.1% increase in area. The proposed system obviates the need for on-chip digital demodulation, filtering, and remodulation normally required to extract Electrode Offset Voltages (EOV) from multiplexed neural signals, thereby achieving 3.6<inline-formula><tex-math notation="LaTeX">$ \times $</tex-math></inline-formula> and 2.8<inline-formula><tex-math notation="LaTeX">$ \times $</tex-math></inline-formula> savings in both area and power, respectively, in the EOV filter module. The Sign-Sign LMS AF is reused to determine the system loop gain, which relaxes the feedback DAC accuracy requirements and saves 10.1<inline-formula><tex-math notation="LaTeX">$ \times $</tex-math></inline-formula> in power compared to conventional oversampled DAC truncation-error ΔΣ-modulator. The proposed SoC is designed and fabricated in 65 nm CMOS, and each channel occupies 0.00179 mm<superscript>2</superscript> of active area. Each channel consumes 5.11 μW of power while achieving 2.19 μV<subscript>rms</subscript> and 2.4 μV<subscript>rms</subscript> of input referred noise (IRN) over AP and LFP bands. The resulting AP band noise efficiency factor (NEF) is 1.8. The proposed system is verified with acute in-vivo recordings in a Sprague-Dawley rat using parylene C based thin-film platinum nanorod microelectrodes.

Details

Language :
English
ISSN :
19324545
Volume :
18
Issue :
4
Database :
Supplemental Index
Journal :
IEEE Transactions on Biomedical Circuits and Systems
Publication Type :
Periodical
Accession number :
ejs67219338
Full Text :
https://doi.org/10.1109/TBCAS.2024.3366649