Compute-In-Memory Technologies for Deep Learning Acceleration

Deep learning accelerators (DLAs) based on compute-in-memory (CIM) technologies have been considered promising candidates to drastically improve the throughput and energy efficiency for running deep neural network models. In this review, we analyze DLA designs reported in the past decade, including both fully digital DLAs and analog CIM based DLAs, to provide insights regarding the current status of CIM technologies and prospective of this emerging field. We observed that the reported CIM designs, even in their early research stage, do provide energy efficiency advantages from measured silicon data over digital DLA. Additionally, it is revealed that the main advantage comes from completely eliminating the run-time DRAM access for weights. For performance benchmarks, we performed a top-down analysis using a generic DLA design and illustrated how fully-weight-stationary CIM DLAs, being no longer bounded by the memory bottleneck, offer large throughput advantages compared to traditional digital DLAs. The benchmark was performed by computing popular models deployed in Google’s TPU accelerator.