Fully Parallel Stochastic Computing Hardware Implementation of Convolutional Neural Networks for Edge Computing Applications

MLA

Frasser, Christiam F., et al. “Fully Parallel Stochastic Computing Hardware Implementation of Convolutional Neural Networks for Edge Computing Applications.” IEEE Transactions on Neural Networks and Learning Systems, vol. 34, no. 12, Dec. 2023, pp. 10408–18. EBSCOhost, https://doi.org/10.1109/TNNLS.2022.3166799.

APA

Frasser, C. F., Linares-Serrano, P., de Rios, I. D. de los, Moran, A., Skibinsky-Gitlin, E. S., Font-Rossello, J., Canals, V., Roca, M., Serrano-Gotarredona, T., & Rossello, J. L. (2023). Fully Parallel Stochastic Computing Hardware Implementation of Convolutional Neural Networks for Edge Computing Applications. IEEE Transactions on Neural Networks and Learning Systems, 34(12), 10408–10418. https://doi.org/10.1109/TNNLS.2022.3166799

Chicago

Frasser, Christiam F., Pablo Linares-Serrano, Ivan Diez de los de Rios, Alejandro Moran, Erik S. Skibinsky-Gitlin, Joan Font-Rossello, Vincent Canals, Miquel Roca, Teresa Serrano-Gotarredona, and Josep L. Rossello. 2023. “Fully Parallel Stochastic Computing Hardware Implementation of Convolutional Neural Networks for Edge Computing Applications.” IEEE Transactions on Neural Networks and Learning Systems 34 (12): 10408–18. doi:10.1109/TNNLS.2022.3166799.