Highly reliable a‐Si:H gate driver on array with complementary double‐sided noise‐eliminating and dual voltage levels for TFT‐LCD applications

In this work, we present a high‐reliability gate driver on array (GOA) for a 10.7‐in. HD (1,280 × RGB × 720) TFT‐LCD panel, featuring an alternatively double‐sided noise‐eliminating function. The gate driver circuit is designed with 12‐phase clock signals that exhibit 75% signal overlapping, threshold voltage recovering, and double‐sided driving schemes. The double‐sided driving scheme reduces the number of mental wires and TFTs in the gate driver circuit, resulting in a smaller layout area for GOA. By utilizing dual levels of voltage, we implemented a negative gate bias method to mitigate threshold voltage shifts for the noise‐eliminating and driving TFTs. This prevents the noises from clock signals effectively. The reliability test of the proposed GOA with 720 stages passed a strict testing condition (90°C and −40°C) for simulation and exhibited good performance over 800 hours at 90°C for measurement. A novel a‐Si gate driver on array (GOA) circuit with dual levels of voltage and negative gate bias method enhances the reliability and performance of the proposed GOA circuit, which also exhibits good performance over 800 h at 90°C for measurement.