Design and Testing of a Prototype ASIC for the MTPC Readout at CSNS Back-n White Neutron Source

In this article, a prototype application-specific integrated circuit (ASIC) for the multipurpose time projection chambers (MTPCs) at back-streaming white neutron source is presented. The ASIC integrates 16 readout channels and is fabricated in a 0.18-<inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> CMOS process. Each channel consists of a charge sensitive amplifier (CSA), a pole-zero cancellation (PZC), two bridged-T shapers, a baseline holder, and a fully differential output buffer. It provides the selectable charge ranges of 2 and 10 pC, the programmable peaking times from 110 ns to <inline-formula> <tex-math notation="LaTeX">$1 \mu \text{s}$ </tex-math></inline-formula>, and an adjustable output common-mode voltage from 0.7 to 1.25 V. The ASIC has already been tested, and all the results meet the requirements. In the case of 100-pF input capacitance, 2-pC charge range, and 1-<inline-formula> <tex-math notation="LaTeX">$\mu \text{s}$ </tex-math></inline-formula> peaking time, it features a maximum integral nonlinearity (INL) of 0.48% and an equivalent noise charge (ENC) of 0.749 fC, which makes the signal-to-noise ratio (SNR) at full-scale input over 2600. In particular, a crosstalk rejection ratio of 63 dB is obtained in this prototype ASIC using the baseline holder circuit in each channel to generate references for single-ended to differential conversion and isolate noise as well as crosstalk from the reference path.