Investigation of Embedded SiGe Source/Drain for 28nm HKMG PFET Performance Enhancement

Embedded SiGe (eSiGe) is one of the mobility boosters for PFET devices in high performance technologies. In this paper, improved performance through higher drive current is demonstrated by the optimization of the eSiGe in a state-of-the-art 28nm logic flow. In particular, the shape of the deposited eSiGe plays an important role for modulating the compressive stress in the PFET channel. Electrical measurements supported by TCAD process and device simulations, confirm that the optimized eSiGe enables a distinctive strain enhancement at the channel region.