3.3 kV 4H-SiC DMOSFET with Highly Reliable Gate Insulator and Body Diode

We investigated improvement ways of to overcome these reliability issues in a 3.3 kV 4H-SiC DMOSFET. JFET doping with (i) narrow width and (ii) deeper depth than that of the p-well region successfully reduced the electric field in the gate insulator and the on-voltage simultaneously. We achieved a low Ron of 26 mΩcm² at a Vg of +15 V and 150 °C. And highly reliable chips of 0.1 Fit were also achieved both at a positive and negative gate bias of +15 V/ -8 V with MTTF of intrinsic lifetime over 20 years at 3 MV/cm. BTI characterstics both in positive and negative biases also proved reliability over 20 years. The body diode showed stable behavior under forward current operation which is suitable for an external diode-less power module.