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2-Mb SPRAM design: bi-directional current write and parallelizing-direction current read based on spin-transfer torque switching
- Source :
- Physica Status Solidi (A) - Applications and Materials Science; December 2007, Vol. 204 Issue: 12 p3929-3933, 5p
- Publication Year :
- 2007
-
Abstract
- A 1.8 V 2-Mb SPRAM (SPin-transfer torque RAM) chip using 0.2-μm logic process with MgO tunneling barrier cell is reviewed, which demonstrates the circuit technologies for potential low power non-volatile RAM, or universal memory. This chip features: an array scheme with bit-by-bit bi-directional current write to achieve proper spin-transfer torque writing of 100-ns, and parallelizing-direction current reading with low voltage bit-line that leads to 40-ns access time. (© 2008 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)
Details
- Language :
- English
- ISSN :
- 18626300 and 18626319
- Volume :
- 204
- Issue :
- 12
- Database :
- Supplemental Index
- Journal :
- Physica Status Solidi (A) - Applications and Materials Science
- Publication Type :
- Periodical
- Accession number :
- ejs13368361
- Full Text :
- https://doi.org/10.1002/pssa.200777120