Scanning Tunneling Microscopy Study of the Multi-Step Deposited and Annealed HfSiOx Gate Dielectric.

Electrical and reliability characteristics of the HfSiO_x high-permittivity (high-k) gate dielectric formed via a single-step and a multi-step deposition-cum-annealing method are examined via ultrahigh-vacuum scanning tunneling microscopy (STM). Unlike the single-step high-k, which exhibits coarse granular features indicating that transformation to a polycrystalline phase has occurred, the multi-step high-k of equivalent physical thickness is observed to retain the nanocrystalline STM characteristics following a high temperature (∼1000°C) anneal. After the localized electrical stress using the STM probe, the multi-step high-k film shows better leakage current uniformity and higher breakdown voltage comparing to those of the single-step film, consistent with the results of the metal-oxide-semiconductor capacitor measurements. The improvements may be ascribed to a partially suppressed formation of the grain boundaries in thin films constituting the multi-step dielectric, which reduces the grain-boundary related low-resistance paths through the dielectric. The results indicate that the multi-step deposition process can improve electrical characteristics of the high-k gate dielectrics. [ABSTRACT FROM AUTHOR]