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The Design on FPGA-based Correlator in GPS Receiver Using ISE.

Authors :
Hui Hu
Chao Yuan
Source :
International Journal of Intelligent Information Technology Application; Jun2010, Vol. 3 Issue 2, p92-97, 6p, 10 Diagrams, 1 Chart, 4 Graphs
Publication Year :
2010

Abstract

The correlator is on of the key modules in GPS receiver, whose realizing construction could influence the positioning accuracy and real-time performance. The realtime FPGA-based GPS Correlator took the early code, late code and prompt code of local C/A code to correlate with the inputting signal parallel to get pre-detection value for GPS signal acquisition. The modules for generating measurement data were mainly designed, such as the carrier Numerical Controlled Oscillator (NCO) phase, carrier cycle count, code phase and epoch count and so on, and GPS correlator containing this module can be used on the GPS receiver for navigation and survey. In addition, the paper describes the designing project of the whole GPS correlator and the detail of each module in this correlator, and all the designs of GPS correlator were implemented in VHDL which were verified in Xilinx Virtex-II Pro development board. The results demonstrate that the GPS correlator can incorporate with microprocessor to realize GPS Receiver Baseband Signal Processing. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
19992459
Volume :
3
Issue :
2
Database :
Supplemental Index
Journal :
International Journal of Intelligent Information Technology Application
Publication Type :
Academic Journal
Accession number :
53070317