Fabrication of a Uniform Low Temperature Poly-Si TFT Array by Optimized Field Aided Lateral Crystallization.

In this study, a 2 in. Ni field aided lateral crystallization (FALC) polySi thinfilm transistor (TFT) (120 x 240) array was fabricated at the maximum process temperature of 500°C using an optimized current density distribution design. We investigated the correlation between crystallization and transistor characteristics in terms of transistor position in the array. Because an identical current density in the channel region of each pixel transistor was favorable to achieve uniform crystallization, an optimal common electrode design was chosen via Mathcad simulation. After the crystallization process, it was confirmed that the crystallinity variation in the transistor channels agreed well with the predicted simulation results. Furthermore, the positional variation in important transistor parameters in the array showed a good match with that of crystallization. The mean threshold voltage was 5.9 V (ΔV_th = ± 0.2 V) while the mean mobility was 92.5 cm² V¹ s¹ with a variation of 9.8%. These values suggested that the uniform NiFALC polySi TET arrays fabricated by the optimal design of the electrode were applicable to the active matrix organic light emitting display backplane. [ABSTRACT FROM AUTHOR]