Interconnection Modeling Challenges in System-in-Package (SiP) Design.

MLA

Bock, Hans-Georg, et al. “Interconnection Modeling Challenges in System-in-Package (SiP) Design.” Scientific Computing in Electrical Engineering, 2006, pp. 413–18. EBSCOhost, https://doi.org/10.1007/978-3-540-32862-9_59.

APA

Bock, H.-G., Hoog, F., Friedman, A., Gupta, A., Neunzert, H., Pulleyblank, W. R., Rusten, T., Santosa, F., Tornberg, A.-K., Anile, A. M., Alì, G., Mascali, G., Castorina, S., & Ene, R. A. (2006). Interconnection Modeling Challenges in System-in-Package (SiP) Design. In Scientific Computing in Electrical Engineering (pp. 413–418). https://doi.org/10.1007/978-3-540-32862-9_59

Chicago

Bock, Hans-Georg, Frank Hoog, Avner Friedman, Arvind Gupta, Helmut Neunzert, William R. Pulleyblank, Torgeir Rusten, et al. 2006. “Interconnection Modeling Challenges in System-in-Package (SiP) Design.” In Scientific Computing in Electrical Engineering, 413–18. doi:10.1007/978-3-540-32862-9_59.