Speed vs. efficiency: A framework for high-frequency trading algorithms on FPGA using Zynq SoC platform.

Software-based technical indicators have been widely used for the stock market forecasting, aiming to predict market direction. Even though many algorithms for the software based technical indicators are presented, there are almost no hardware implementations reported in the literature. In this paper, the hardware implementation is presented for three commonly used technical indicators: Moving Average Convergence/Divergence (MACD), Relative Strength Index (RSI), and Aroon. Latency evaluation is conducted for Bitcoin and Ethereum within a single-day timeframe, utilizing the Xilinx Zynq-7000 programmable SoC XC7Z020-CLG484-1 platform. Additionally, various hardware/software (HW/SW) partitioning strategies are explored to leverage the flexibility of software alongside the performance advantages of hardware via the Zynq SoC platform. The results show that the best performing technical indicator is MACD with a speedup of 30 times over its software only counterpart. Furthermore, a hybrid design integrating multiple technical indicators is proposed, pairing MACD with RSI due to their competitive throughput values, differing by only 0.38 microseconds. This hybrid approach capitalizes on the parallel processing capabilities of hardware, enabling multiple systems to operate simultaneously. • Proposed SoC framework boosts HFT system efficiency. • HW/SW partitioning on Zynq-7000 SoC enhances flexibility. • MACD, RSI, Aroon indicators implemented for forecasting. • MACD outperforms others on ZYNQ SoC, 30x faster than software. • MACD and RSI combination optimal for hybrid designs. [ABSTRACT FROM AUTHOR]