Realization of Ultra-Scaled MoS2 Vertical Diodes via Double-Side Electrodes Lamination.

MLA

Li, Wanying, et al. “Realization of Ultra-Scaled MoS2 Vertical Diodes via Double-Side Electrodes Lamination.” Nano Letters, vol. 22, no. 11, June 2022, pp. 4429–36. EBSCOhost, https://doi.org/10.1021/acs.nanolett.2c00922.

APA

Li, W., Liu, L., Tao, Q., Chen, Y., Lu, Z., Kong, L., Dang, W., Zhang, W., Li, Z., Li, Q., Tang, J., Ren, L., Song, W., Duan, X., Ma, C., Xiang, Y., Liao, L., & Liu, Y. (2022). Realization of Ultra-Scaled MoS2 Vertical Diodes via Double-Side Electrodes Lamination. Nano Letters, 22(11), 4429–4436. https://doi.org/10.1021/acs.nanolett.2c00922

Chicago

Li, Wanying, Liting Liu, Quanyang Tao, Yang Chen, Zheyi Lu, Lingan Kong, Weiqi Dang, et al. 2022. “Realization of Ultra-Scaled MoS2 Vertical Diodes via Double-Side Electrodes Lamination.” Nano Letters 22 (11): 4429–36. doi:10.1021/acs.nanolett.2c00922.