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Impact of Technology Scaling in sub-100 nm nMOSFETs on Total-Dose Radiation Response and Hot-Carrier Reliability.

Authors :
Arora, Rajan
Fleetwood, Zachary E.
Zhang, En Xia
Lourenco, Nelson E.
Cressler, John D.
Fleetwood, Daniel M.
Schrimpf, Ronald D.
Sutton, Akil K.
Freeman, Greg
Greene, Brian
Source :
IEEE Transactions on Nuclear Science; 6/10/2014 Part 2, Vol. 61 Issue 3, p1426-1432, 7p
Publication Year :
2014

Abstract

The total-dose radiation tolerance of 32-nm nFETs is investigated. nFETs built in 32-nm RF-CMOS-on-SOI technology with high-k dielectrics show increased off-state leakage current and electron trapping in the gate oxide. The impact of CMOS-on-SOI technology scaling (from 65-nm to 32-nm) on the total-dose radiation tolerance and hot-carrier reliability (HCR) is investigated through both experiments and supporting TCAD simulations. The 32-nm nFETs exhibit less total-dose degradation compared to 45-nm nFETs. However, the hot-carrier degradation increases as the technology scales. An interplay of electric-field in the gate oxide and impact ionization in the channel region is responsible for the observed differences in the degradation mechanisms for the three technologies. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00189499
Volume :
61
Issue :
3
Database :
Complementary Index
Journal :
IEEE Transactions on Nuclear Science
Publication Type :
Academic Journal
Accession number :
96647352
Full Text :
https://doi.org/10.1109/TNS.2014.2320494