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A cross-level verification methodology for digital IPs augmented with embedded timing monitors.

Authors :
Guarnieri, V.
Petricca, M.
Sassone, A.
Vinco, S.
Bombieri, N.
Fummi, F.
Macii, E.
Poncino, M.
Source :
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE); 01/01/2014, p1-6, 6p
Publication Year :
2014

Details

Language :
English
ISBNs :
9783981537024
Database :
Complementary Index
Journal :
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE)
Publication Type :
Conference
Accession number :
96146473
Full Text :
https://doi.org/10.7873/DATE2014.262