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Nano enabled 3D integration of on-chip ESD protection for ICs.
- Source :
- 2013 13th IEEE International Conference on Nanotechnology (IEEE-NANO 2013); 2013, p19-23, 5p
- Publication Year :
- 2013
-
Abstract
- This paper reviews recent advances in 3D on-chip electrostatic discharge (ESD) protection design for integrated circuits (IC). Traditional ESD protection relies on PN-junction-based structures, which have inherent disadvantages including fixed ESD triggering and parasitic effects. New ESD protection mechanisms and structures, including nano crystal dots and nano crossbar concepts, provide alternative non-traditional ESD protection solutions enabling post-Si field programmable and above-IC ESD circuit designs. The new ESD protection concepts represent a paradigm change in ESD protection designs and are potential solutions to next-generation nano circuits and systems. [ABSTRACT FROM PUBLISHER]
Details
- Language :
- English
- ISBNs :
- 9781479906765
- Database :
- Complementary Index
- Journal :
- 2013 13th IEEE International Conference on Nanotechnology (IEEE-NANO 2013)
- Publication Type :
- Conference
- Accession number :
- 94525418
- Full Text :
- https://doi.org/10.1109/NANO.2013.6720875