Impact of the gate-drain overlapped device (GOLD) for deep submicrometer VLSI.

MLA

Izawa, R., et al. “Impact of the Gate-Drain Overlapped Device (GOLD) for Deep Submicrometer VLSI.” IEEE Transactions on Electron Devices, vol. 35, no. 12, Jan. 1988, pp. 2088–93. EBSCOhost, https://doi.org/10.1109/16.8781.

APA

Izawa, R., Kure, T., & Takeda, E. (1988). Impact of the gate-drain overlapped device (GOLD) for deep submicrometer VLSI. IEEE Transactions on Electron Devices, 35(12), 2088–2093. https://doi.org/10.1109/16.8781

Chicago

Izawa, R., T. Kure, and E. Takeda. 1988. “Impact of the Gate-Drain Overlapped Device (GOLD) for Deep Submicrometer VLSI.” IEEE Transactions on Electron Devices 35 (12): 2088–93. doi:10.1109/16.8781.