IIA-7 InGaAs gate GaAs SIS FET with controllable threshold voltage.

MLA

Matsumoto, K., et al. “IIA-7 InGaAs Gate GaAs SIS FET with Controllable Threshold Voltage.” IEEE Transactions on Electron Devices, vol. 33, no. 11, Jan. 1986, p. 1840. EBSCOhost, https://doi.org/10.1109/T-ED.1986.22765.

APA

Matsumoto, K., Ogura, M., Wada, T., Takafumi Yao, Hayashi, Y., Hashizume, N., Fukuhara, N., Kinosada, T., Hirashima, H., & Miyashita, T. (1986). IIA-7 InGaAs gate GaAs SIS FET with controllable threshold voltage. IEEE Transactions on Electron Devices, 33(11), 1840. https://doi.org/10.1109/T-ED.1986.22765

Chicago

Matsumoto, K., M. Ogura, T. Wada, Takafumi Yao, Y. Hayashi, N. Hashizume, N. Fukuhara, T. Kinosada, H. Hirashima, and T. Miyashita. 1986. “IIA-7 InGaAs Gate GaAs SIS FET with Controllable Threshold Voltage.” IEEE Transactions on Electron Devices 33 (11): 1840. doi:10.1109/T-ED.1986.22765.