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An efficient full-chip ESD paths resistance value verification flow for large scale designs.

Authors :
Wu, Meng-Fan
Tsai, Chun-Chien
Tseng, Jen-Chou
Chao, Roger
Song, Ming-Hsiang
Cheng, Yi-Kan
Source :
2013 35th Electrical Overstress/Electrostatic Discharge Symposium; 2013, p1-4, 4p
Publication Year :
2013

Details

Language :
English
ISBNs :
9781585372324
Database :
Complementary Index
Journal :
2013 35th Electrical Overstress/Electrostatic Discharge Symposium
Publication Type :
Conference
Accession number :
92910947

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