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Optimized netlist checks — Full chip ESD verification.

Authors :
Trivedi, N.
Chakravarthy, S.
Alvarezr, D.
Weidner, E.
Source :
2013 35th Electrical Overstress/Electrostatic Discharge Symposium; 2013, p1-9, 9p
Publication Year :
2013

Details

Language :
English
ISBNs :
9781585372324
Database :
Complementary Index
Journal :
2013 35th Electrical Overstress/Electrostatic Discharge Symposium
Publication Type :
Conference
Accession number :
92910922

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