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A 9-ns HIT-delay 32-kbyte cache macro for high-speed RISC.
- Source :
- IEEE Journal of Solid-State Circuits; 1990, Vol. 25 Issue 1, p100-108, 9p
- Publication Year :
- 1990
Details
- Language :
- English
- ISSN :
- 00189200
- Volume :
- 25
- Issue :
- 1
- Database :
- Complementary Index
- Journal :
- IEEE Journal of Solid-State Circuits
- Publication Type :
- Academic Journal
- Accession number :
- 92812330
- Full Text :
- https://doi.org/10.1109/4.50291