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An ECL 5000-gate gate array with 190-ps gate delay.

Authors :
Tatsuki, M.
Kato, S.
Okabe, M.
Yakushiji, H.
Kuramitsu, Y.
Source :
IEEE Journal of Solid-State Circuits; 1986, Vol. 21 Issue 2, p234-239, 6p
Publication Year :
1986

Details

Language :
English
ISSN :
00189200
Volume :
21
Issue :
2
Database :
Complementary Index
Journal :
IEEE Journal of Solid-State Circuits
Publication Type :
Academic Journal
Accession number :
92811485
Full Text :
https://doi.org/10.1109/JSSC.1986.1052509