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Garp: a MIPS processor with a reconfigurable coprocessor.

Authors :
Hauser, J.R.
Wawrzynek, J.
Source :
Proceedings The 5th Annual IEEE Symposium on Field-Programmable Custom Computing Machines Cat No97TB100186); 1997, p12-21, 10p
Publication Year :
1997

Details

Language :
English
ISBNs :
9780818681592
Database :
Complementary Index
Journal :
Proceedings The 5th Annual IEEE Symposium on Field-Programmable Custom Computing Machines Cat No97TB100186)
Publication Type :
Conference
Accession number :
92338450
Full Text :
https://doi.org/10.1109/FPGA.1997.624600