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The VLSI design of a digital fuzzification circuit for a 4 input CMOS fuzzy processor running at a rate of 320 ns.

Authors :
Gabrielli, A.
Gandolfi, E.
Masetti, M.
Source :
1st International Symposium on Neuro-Fuzzy Systems, AT '96 Conference Report; 1996, p33-37, 5p
Publication Year :
1996

Details

Language :
English
ISBNs :
9780780333673
Database :
Complementary Index
Journal :
1st International Symposium on Neuro-Fuzzy Systems, AT '96 Conference Report
Publication Type :
Conference
Accession number :
92140969
Full Text :
https://doi.org/10.1109/ISNFS.1996.603817