A 32 b 64-matrix parallel CMOS processor.

Authors :: ShaoWei Pan
Ben-Arie, Y.
Orian, E.
Barak, I.
Shapira, Y.
Bresticker, S.
David, H.
Folkman, H.
Efrat, J.
Tzukerman, L.
Dahan, Z.
Kolton, D.
Shvager, Y.
Source :: 1999 IEEE International Solid-State Circuits Conference Digest of Technical Papers ISSCC First Edition (Cat No99CH36278); 1999, p262-263, 2p
Publication Year :: 1999

Language :: English
ISBNs :: 9780780351264
Database :: Complementary Index
Journal :: 1999 IEEE International Solid-State Circuits Conference Digest of Technical Papers ISSCC First Edition (Cat No99CH36278)
Publication Type :: Conference
Accession number :: 92135856
Full Text :: https://doi.org/10.1109/ISSCC.1999.759237