System-on-programmable-chip implementation of diminishing learning based pattern recognition system.

MLA

Manikandan, J., and B. Venkataramani. “System-on-Programmable-Chip Implementation of Diminishing Learning Based Pattern Recognition System.” International Journal of Machine Learning & Cybernetics, vol. 4, no. 4, Aug. 2013, pp. 347–63. EBSCOhost, https://doi.org/10.1007/s13042-012-0102-z.

APA

Manikandan, J., & Venkataramani, B. (2013). System-on-programmable-chip implementation of diminishing learning based pattern recognition system. International Journal of Machine Learning & Cybernetics, 4(4), 347–363. https://doi.org/10.1007/s13042-012-0102-z

Chicago

Manikandan, J., and B. Venkataramani. 2013. “System-on-Programmable-Chip Implementation of Diminishing Learning Based Pattern Recognition System.” International Journal of Machine Learning & Cybernetics 4 (4): 347–63. doi:10.1007/s13042-012-0102-z.